# Generated by makepkg 6.0.1
# using fakeroot version 1.26
pkgname = vtr
pkgbase = vtr
pkgver = 8.0.0-4
pkgdesc = Verilog to Routing -- Open Source CAD Flow for FPGA Research
url = https://verilogtorouting.org
builddate = 1637948324
packager = Antonio Rojas <arojas@archlinux.org>
size = 20454327
arch = x86_64
license = MIT
depend = ctags
depend = tbb
makedepend = cmake
