%FILENAME%
verilator-5.002-1-x86_64.pkg.tar.zst

%NAME%
verilator

%BASE%
verilator

%VERSION%
5.002-1

%DESC%
The fastest free Verilog HDL simulator

%CSIZE%
5389396

%ISIZE%
25329578

%MD5SUM%
9cb66828548c4ceb1e9c6fc3941adb12

%SHA256SUM%
8df53308a76d73738ebbd781df9abd88d54e646ed938478f19f69621a194b80f

%PGPSIG%
iQIzBAABCAAdFiEEtZcfLFwQqaCMYAMPeGxj8zDXy5IFAmNehnMACgkQeGxj8zDXy5IWUQ//ZzVAEZV3cuowaZdhyHp2p1gOqHoLz4/CbZNLEY7Izstzc/yXjGETIGZsz1YqemsD9eoTv4gsZZxmlB6YIf9BRQXe+f5hp0sD0IvvUZcG+axyVxfypgDy+JlWhC0a0gP6sdlJtCi8TH/Oc2o9gpxg2o08szgBPKoJH6S3XOTZ4jR4x+eG2M1DQbBBwzM2upR152VGLlThMy9MO4B2gKHo9lMR7FYioauXKu0XwHI1+7EImBF3YknCXgFKuz9ReYZr/tVvCb0rlw54ToAUzyTN5HrYRlTttAQmsW9AZrozoXBViKS8KjQgPo3UHACMcNMI/sQxZN6x9BNjkW5uVO19hCCn2ALdR0X0dZlAzjHyKCARUTiEF/KEzMA3c9O/L/hZKJ9FzubkwKdzsbHUAGS2dq7Q1jVEecOvtYcNBFcbQkxHlZdYnE3i9xYum2CNVR74yQlPTntIb90HqX1AATqgOdyCzRxPGGbqRMqwNeYBzYghqTmwxk4L2MQj4p+As2UMXLfiaAtxpXob8EtFG9aBChArc8WkhzSCL1mG2gR+/HBnHvIaXZEntWSOSIDNcRZ1fswxdG/w/E5yB0Jc6fFu58L6OjuKgQSVQNTp1lJmryfEah2ZIL2I9dTyORDHTgH70wLKcXFCPfhnRCxPlWmF9PjqWZZ+dfDwKJgylasZjXk=

%URL%
https://www.veripool.org/projects/verilator/wiki/Intro

%LICENSE%
LGPL

%ARCH%
x86_64

%BUILDDATE%
1667138992

%PACKAGER%
Felix Yan <felixonmars@archlinux.org>

%DEPENDS%
perl

%OPTDEPENDS%
systemc

%MAKEDEPENDS%
python
systemc
lsb-release

